To prolong battery life, low power standby modes have been incorporated into processors to conserve power in portable computers and hand held wireless communication devices. This low power standby or drowsy mode may use analog circuitry to raise the back bias potential VSS that is supplied to source terminals of N-channel transistors. The increased VSS operating voltage above ground produces a reverse body bias that increases the threshold voltage of these N-channel transistors. In order to lower the source-to-drain leakage currents in the drowsy mode, the N-well regions of P-channel transistors may also receive a raised bias that provides a higher threshold voltage.
There is a continuing need for better ways to provide flexibility for operating a microprocessor or other digital circuits while preserving low power operation and the stability of any embedded devices.